# -*- coding: utf-8; mode: tcl; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- vim:fenc=utf-8:ft=tcl:et:sw=4:ts=4:sts=4
# $Id: Portfile 97555 2012-09-09 03:43:15Z ryandesign@macports.org $

PortSystem          1.0

name                iverilog
version             0.9.6
set branch          [join [lrange [split ${version} .] 0 1] .]
categories          science
license             GPL-2+
platforms           darwin
maintainers         nomaintainer

description         Icarus Verilog

long_description    Icarus Verilog is a Verilog simulation and synthesis tool. \
                    It operates as a compiler, compiling source code writen in \
                    Verilog (IEEE-1364) into some target format. For batch \
                    simulation, the compiler can generate C++ code that is \
                    compiled and linked with a run time library (called \
                    \"vvm\") then executed as a command to run the simulation. \
                    For synthesis, the compiler generates netlists in the \
                    desired format.

homepage            http://iverilog.icarus.com/
master_sites        ftp://ftp.icarus.com/pub/eda/verilog/v${branch}/
distname            verilog-${version}

checksums           rmd160  19c422fbb2b0834a7408a5d549015f604dd3cabe \
                    sha256  25304d5d58d6411fcd1ab94992a505215eea5a6bbd9779c2be2d9d19f38cd54a

depends_lib         port:bzip2 \
                    port:readline \
                    port:zlib

test.run            yes
test.target         check

destroot.destdir    prefix=${destroot}${prefix}

post-destroot {
    set docdir ${destroot}${prefix}/share/doc/${name}
    xinstall -d ${docdir}
    xinstall -W ${worksrcpath} \
        BUGS.txt developer-quick-start.txt lpm.txt t-dll.txt \
        QUICK_START.txt extensions.txt macosx.txt va_math.txt \
        README.txt glossary.txt mingw.txt vpi.txt \
        attributes.txt ieee1364-notes.txt netlist.txt \
        xilinx-hint.txt ivl_target.txt swift.txt \
        ${docdir}

    set exampledir ${destroot}${prefix}/share/example
    xinstall -d ${exampledir}
    file copy ${worksrcpath}/examples ${exampledir}
    file rename ${exampledir}/examples ${exampledir}/${name}
}

platform darwin 8 {
    depends_build-append    port:bison
}

# g++-4.2: -E, -S, -save-temps and -M options are not allowed with multiple -arch flags
universal_variant   no

livecheck.type      regex
livecheck.url       ${master_sites}
livecheck.regex     "verilog-(\\d+(?:\\.\\d+)*)${extract.suffix}"
